Checking RTECTL properties of STSs via SMT-based Bounded Model Checking

Checking RTECTL Properties of STSs via SMT-Based Bounded Model Checking

Checking WECTLK Properties of TRWISs via SMT-based Bounded Model Checking

In this paper, we present a Satisfiability Modulo Theory based (SMT-based) bounded model checking (BMC) method for Timed Real-Weighted Interpreted Systems and for the existential fragment of the Weighted Epistemic Computation Tree Logic. SMT-based bounded model checking consists in translating the existential model checking problem for a modal logic and for a model to the satisfiability problem...

Bounded Model Checking of Graph Transformation Systems via SMT Solving

Bounded model checking (BMC) complements classical model checking by an efficient technique for checking error-freedom of bounded system paths. Usually, BMC approaches reduce the verification problem to propositional satisfiability. With the recent advances in SAT solving, this has proven to be a fast analysis. In this paper we develop a bounded model checking technique for graph transformation...

SMT-Based Model Checking

Bounded Model Checking of Multi-threaded Software using SMT solvers

The transition from single-core to multi-core processors has made multi-threaded software an important subject in computer aided verification. Here, we describe and evaluate an extension of the ESBMC model checker to support the verification of multi-threaded software with shared variables and locks using bounded model checking (BMC) based on Satisfiability Modulo Theories (SMT). We describe th...